EE 241 Digital Circuits Laboratory
2014-2015 Spring Semester
Instructor: Doç. Dr. Sıddıka Berna Örs
TA: Erol Asığ
- Grades has been updated. Laboratory project has been added.
- Experiment-5 has been added to the page.
- Experiment-4 has been added to the page.
- Homework-3 has been added to the page.
- Experiment-3 has been added to the page.
- Midterm and homework grades has been added to the page.
- Homework-2 has been added to the page. Experiment grades has been added.
- Experiment-1 has been added. Do not forget to check the laboratory schedule!
- Homework-1 has been added. You will find the required files in the subsection of verilog documentation.
- Laboratory schedule has been updated. Experiment-1 has been added.
- Experiment-0 has been added. Do not forget to bring required datasheets!
- If you experience problems running your Xilinx WebPack software on Windows 8 operating system, please have a look at the post on this thread for 64-bit and this for 32-bit.
- 2014-2015 Spring schedule has been added.
- Chapter #1
- Chapter #2
- Chapter #3
- Chapter #4
- Chapter #5
- Chapter #6
Datasheets of Logic ICs
Please refer to the Datasheets Page.