EE 241 Digital Circuits Laboratory
2013-2014 Spring Semester
- Lab final will be handled on May 15th, 2014 at 18:00. Classroom is B210.
- 5th experiment is published. Please read carefully and design your circuits for May 14th and 15th. (Sec. 1 & 2)
- Your Midterm#2 grades are here.
- If you experience problems running your Xilinx WebPack software on Windows 8 operating system, please have a look at the post on this thread for 64-bit and this for 32-bit.
- Experiment #0 : Basic Digital Circuit Implementation
- Experiment #1 : Binary Multiplier Design
- Experiment #2 : Binary Adder Design
- Experiment #3 : Absolute Value and Comparator Circuits
- Experiment #4 : Counters
- Experiment #5 : State Sequencer Design
- Lab Rules
- Verilog Operators
- Chapter #1
- Chapter #2
- Chapter #3
- Chapter #4
- Chapter #5
- Chapter #6
Datasheets of Logic ICs
Please refer to the Datasheets Page.